Nireekshan Kumar Sodavaram

From ElecWeb

(Difference between revisions)
Jump to: navigation, search
(Nireekshan Kumar Sodavaram)
(Nireekshan Kumar Sodavaram)

Revision as of 16:04, 19 August 2010

Nireekshan Kumar

Nireekshan Kumar Sodavaram

B.E (E.E.E) (Madras University, India), M.E (VLSI Design) (Karunya University, India)

''PhD Student''

  • Room: 530
  • Telephone: 479 9036
  • Mobile: 0211 404 617
  • Email: <mail></mail>

Research Interests

  • Inverse Problems
  • Bayesian Approach to Inverse Problems
  • Efficient Embedded Processor Design
  • Mathematical Modeling using FPGA

International/National Conferences

  • Presented a paper titled "Delay & Power optimization of sequential circuits through DJP Algorithm" in World Congress organized by IAENG at Imperial College, London, UK[1]
  • Presented a paper titled "Delay Optimization of Sequential Circuits through Re-timing in e-swift e-blog organized by Govt. College of Salem, Salem, India.